Vendors · 43 pages
- STM32 (ST) — overview
- STM32 F / G / H mainstream
- STM32 L / U low-power
- STM32 WB / WL wireless
- NXP Kinetis & i.MX RT
- NXP LPC family
- Nordic nRF
- Nordic nRF53 dual-core
- Nordic nRF91 cellular
- Raspberry Pi RP2040 / RP2350
- Renesas RA / RX
- TI Tiva / MSP432
- TI Sitara (Cortex-A + R)
- Microchip SAM
- Silicon Labs EFM32 / EFR32
- Infineon XMC / PSoC
- Infineon AURIX
- GigaDevice GD32 — overview
- GD32F mainstream (M3/M4)
- GD32L low-power (M23)
- GD32W wireless (M33)
- Artery AT32 — overview
- AT32F4 mainstream (M4)
- AT32M motor / power
- Nuvoton NuMicro — overview
- NuMicro M0 entry-level
- NuMicro M4 mainstream
- NuMicro M23 secure
- Ambiq Apollo — overview
- Apollo4 sub-µA M4F
- Apollo510 / Apollo5 (Helium M55)Helium
- Maxim / ADI MAX32 — overview
- MAX32 general-purpose M4
- MAX78000 ML acceleratorAI
- NVIDIA Jetson — overview
- Jetson Orin Nano / NX
- Jetson AGX Orin / Thor
- MediaTek — overview
- MediaTek Genio (IoT A-series)
- MediaTek Filogic Wi-Fi router
- Rockchip — overview
- Rockchip RK3566 / RK3568
- Rockchip RK3588 / RK3582
Artery Technology AT32
Shanghai-based vendor of high-performance Cortex-M4 MCUs targeting STM32F4 replacement at lower cost — 240 MHz clocks, larger flash, AT-Link debug, and aggressive China-market pricing.
Artery Technology (雅特力科技) is a Shanghai-headquartered fabless MCU company founded in 2016. Inside three years it shipped the AT32F403, a pin-compatible higher-clocked replacement for STMicroelectronics' STM32F103; by 2021 the AT32F4 line ran at 240 MHz versus the STM32F407's 168 MHz, with more flash and lower prices, and Artery had become — alongside GigaDevice — one of the two serious Chinese competitors in the Cortex-M4 mainstream. The company is not as broad as GigaDevice (no Wi-Fi, no Cortex-M7, no Cortex-R) and is laser-focused on M4 performance at low cost for industrial, motor-control, and consumer designs.
This page covers the company, the portfolio shape, and the engineering trade-offs of choosing AT32 over STM32 or GD32 for a new project.
- Founded
- 2016, Shanghai, China; private (no IPO as of 2026)
- Arm IP licensed
- Cortex-M0+ (entry parts), Cortex-M4F (volume parts), Cortex-M33 announced for wireless line
- Flagship parts
- AT32F435 / F437 (M4F @ 288 MHz, 4 MB flash), AT32F423 (M4F @ 150 MHz, low-cost), AT32WB415 (BLE)
- Process node
- TSMC 55 nm for most parts, TSMC 40 nm ULP for newest WB / efficient lines
- IDE / SDK
- Artery BSP (LL-style + HAL-style), Keil MDK DFP, IAR EWARM DFP, GCC + OpenOCD, AT32 Work Bench (Eclipse)
- Programming tools
- AT-Link (CMSIS-DAP), AT-Link Pro (with isolation), J-Link supported, ROM USART / USB-DFU bootloader
- Website
- arterychip.com (English) / arterytek.com
- Distribution
- LCSC dominant, Mouser and Digi-Key carry common parts, regional Chinese reps
Company and positioning
Artery was founded in 2016 by ex-Spansion and ex-ISSI engineers. The pitch from day one was narrower than GigaDevice's: don't try to build the whole MCU portfolio, build the Cortex-M4 part that the market actually buys — high-clock, big-flash, peripheral-rich, pin-compatible with STM32F407 — and sell it at a discount. The first part, AT32F403, was a pin-compatible STM32F103 clone running at 240 MHz on the M4 core (more capable than the F1's M3) with double the flash. It found design wins in domestic-market motor drives and industrial controllers almost immediately.
Through the 2020-2022 STM32 shortage, Artery rode the same wave as GigaDevice. The catalogue widened to include the AT32F435 / F437 (288 MHz M4F, the highest-clocked Cortex-M4 mainstream MCU available from any vendor as of 2026), the AT32F421 cost-optimized M4F, the AT32F423 with USB and CAN, and the AT32A403A automotive-grade variant for AEC-Q100 industrial. Wireless was announced as AT32WB415 (BLE 5.0 + M4F) in 2023 but volume shipment didn't begin until late 2024.
The company has aggressive published roadmaps for a Cortex-M33 line (AT32S series, security-focused) and an "AT32M" dedicated motor-control line. Both are covered on this site as separate pages where they exist in volume.
Product family map
| Line | Core | Clock | Flash | Position |
|---|---|---|---|---|
| AT32F403 | Cortex-M4F | 240 MHz | up to 1 MB | First-gen STM32F103 replacement at higher clock |
| AT32F403A / F407 | Cortex-M4F | 240 MHz | up to 1 MB | Connectivity line — Ethernet, USB OTG |
| AT32F415 | Cortex-M4F | 150 MHz | up to 256 KB | Mid-range with USB |
| AT32F421 | Cortex-M4F | 120 MHz | up to 64 KB | Cost-optimised M4F entry |
| AT32F423 | Cortex-M4F | 150 MHz | up to 256 KB | USB + CAN, mainstream |
| AT32F425 | Cortex-M4F | 96 MHz | up to 64 KB | USB-C, USB-PD reference |
| AT32F435 / F437 | Cortex-M4F | 288 MHz | up to 4 MB | High-performance flagship |
| AT32A403A | Cortex-M4F | 240 MHz | up to 1 MB | Automotive AEC-Q100 |
| AT32M412 (planned) | Cortex-M4F | tbd | tbd | Dedicated motor-control sub-line |
| AT32WB415 | Cortex-M4F | 168 MHz | 1 MB | BLE 5.0 + M4F, in production from 2024 |
Volume in 2026 is in the F403A/F407 (drop-in STM32F407 replacement), the F421/F423 (cost-down small designs), and the F435/F437 (designs that need maximum M4 throughput).
The STM32F4 compatibility story
Artery's pitch leans harder on direct STM32F4 compatibility than GigaDevice's does. The F403A and F407 are designed to be drop-in replacements for STM32F405 / F407 — same pinout in the same package, same peripheral register addresses, same vector table, same ROM bootloader on the same UART pins. In Artery's own benchmark a stock STM32F407 binary running CoreMark on an AT32F407 with no recompilation scores 614 CoreMark vs the original 608, just by virtue of the higher clock.
| Compatibility area | AT32F403A vs STM32F405 | AT32F435 vs STM32F407 | AT32F423 vs STM32F412 |
|---|---|---|---|
| Pinout / package | Identical | Identical | Similar |
| GPIO / AFIO | Identical | Identical | Similar |
| USART / SPI / I2C | Identical | Identical | Identical |
| ADC | Identical | Similar, wider input range | Similar |
| DMA streams | Identical | Identical | Similar |
| USB OTG-FS | Identical (Synopsys-derived) | Identical | Identical |
| Ethernet MAC | Identical | Identical | n/a |
| CAN | bxCAN identical | CAN-FD added | bxCAN identical |
| Flash organisation | Identical sectors | Dual-bank, larger | Identical |
| Clock tree | Same PLL, wider PLL N range | Different multiplier ranges | Similar |
| SDIO | Present | Present | Not present |
Performance differences worth noting:
- AT32F4 clocks at 240 MHz, the STM32F4 maxes at 180 MHz. Real CoreMark for the AT32F435 at 288 MHz is ~720, vs ~600 on a same-package STM32F407 at 168 MHz.
- Flash size is larger on equivalent parts. AT32F437ZM has 4 MB of internal flash on a 144-pin LQFP; STM32F407 maxes at 2 MB.
- Some peripherals are missing. AT32F407 does not have SDIO (it has it on F415 instead); STM32F407 does. AT32F407 has 8 UARTs; STM32F407 has 6.
- Flash latency is similar at the matching clock, but the AT32F435 needs more wait states to reach 288 MHz — Artery's flash accelerator (their analogue to ART) is necessary above 100 MHz.
Software ecosystem
Artery publishes their own firmware library in two flavours:
- AT32 BSP (Board Support Package) — a single repo per device family containing the CMSIS device header, a HAL-style high-level driver layer, an LL-style register-direct layer, the startup file in GCC / IAR / Keil flavours, and a set of example projects per peripheral. The HAL layer mirrors STMicro's old Standard Peripheral Library function names (
gpio_init,usart_enable) rather than the modern STM32 HAL — closer to a port of the SPL than to a port of the new HAL. - AT32 Work Bench — Eclipse-CDT based IDE bundled with GCC and AT-Link drivers. Free.
Toolchain support outside Artery's own packaging:
- Keil MDK — device family pack maintained by Artery, installable through Keil's Pack Manager. Full register browser, debug script, J-Link integration.
- IAR EWARM — DFP installable through IAR.
- PlatformIO — community-maintained
platform-arteryrepository covers the popular AT32F403, F407, F415, F421, F435, F437 boards. - Zephyr — initial support added in 3.5 (limited coverage; F405A / F407 / F435 / F437 with UART, GPIO, SPI, I2C, ADC, no Ethernet yet).
- Rust embedded-hal —
at32f4xx-halcrate exists for F403 and F407, contributor-maintained.
The AT-Link is Artery's official debug probe, an under-$10 CMSIS-DAP plus a USART-to-USB adapter on one board. The Pro version adds galvanic isolation. Both are sold openly through Mouser, LCSC, and Artery's webstore. OpenOCD with the at32f4x.cfg target file recognises the chip's IDCODE and works against any CMSIS-DAP probe.
Differences from STM32F4 to plan for
The pinout matches and the register map almost matches, but enough deviates that you should not ship STM32 firmware on an AT32 board without re-validation. The recurring gotchas:
- Clock tree multipliers — the AT32F4 PLL has multiplier ranges that overlap STM32F4 but the integer bounds are different. The clock-tree configurator in Artery's BSP generates correct values; a hand-coded
RCC->CFGRfrom STM32 firmware will likely produce the wrong frequency. - Flash erase time — Artery flash sectors take 20% to 30% longer to erase than STM32 sectors at the same address. Code that polls FLASH_SR with a hard timeout calibrated for STM32 will fail.
- ADC sample timing — the AT32 ADC has a wider input voltage tolerance and slightly different minimum sample-time requirements per source impedance. Re-run sample-time calculation from the AT32 datasheet electrical characteristics.
- USB enumeration timing — the AT32F407 USB OTG is Synopsys-compatible but a few status-register bits differ. Most USB stacks (TinyUSB, ChibiOS USB, FreeRTOS+USB) have an AT32 port that handles the differences.
Cross-references
- AT32F4 mainstream — deep dive into the F403 / F407 / F415 / F421 / F423 / F435 / F437 lines.
- AT32M motor control — dedicated motor-control variants.
- GigaDevice GD32 — the other major Chinese vendor.
- STM32 mainstream — the parts being targeted.
- Cortex-M4 — core architecture.
- OpenOCD — debug probe setup for AT-Link.