Cheatsheets

The bench-side reference.

Quick-lookup tables and command summaries for when you're at the workstation and need an answer in five seconds, not five clicks.

GCC flags by CPU

Core	-mcpu=	-mfpu=	float-abi
M0/M0+	cortex-m0plus	—	soft
M3	cortex-m3	—	soft
M4 (no FPU)	cortex-m4	—	soft
M4F	cortex-m4	fpv4-sp-d16	hard
M7 (SP)	cortex-m7	fpv5-sp-d16	hard
M7 (DP)	cortex-m7	fpv5-d16	hard
M23	cortex-m23	—	soft
M33	cortex-m33	fpv5-sp-d16	hard
M55	cortex-m55	auto	hard
M85	cortex-m85	fpv5-d16	hard

always add: -mthumb -ffunction-sections -fdata-sections -Wl,--gc-sections

CMSIS barriers — what to use when

Need	Call
Order memory ops	__DMB()
Wait for memory ops	__DSB()
Flush pipeline (sys reg)	__DSB(); __ISB();
Sleep until interrupt	__WFI()
Sleep until event	__WFE()
Disable all IRQs	__disable_irq()
Mask by priority	__set_BASEPRI(p << (8 - bits))

GDB / probe-rs essentials

target extended-remote :3333    # connect
monitor reset halt              # halt at reset
load                            # flash + load symbols
break main                      # set breakpoint
continue / c                    # run
step / s                        # step (source)
stepi / si                      # step (instruction)
next / n                        # step over
finish                          # run to return
backtrace / bt                  # call stack
info registers                  # register dump
x/16wx 0xE000ED00               # examine 16 words hex at addr
set $pc = 0x08000200            # poke PC
monitor reset run               # reset + run

Cortex-M memory map

Region	Address
Code (flash)	0x0000_0000 – 0x1FFF_FFFF
SRAM	0x2000_0000 – 0x3FFF_FFFF
Peripheral	0x4000_0000 – 0x5FFF_FFFF
External RAM	0x6000_0000 – 0x9FFF_FFFF
External device	0xA000_0000 – 0xDFFF_FFFF
Private Peripheral Bus	0xE000_0000 – 0xE00F_FFFF
SCB base	0xE000_ED00
NVIC base	0xE000_E100
SysTick base	0xE000_E010
MPU base	0xE000_ED90

Exception numbers

1	Reset
2	NMI
3	HardFault
4	MemManage
5	BusFault
6	UsageFault
7	SecureFault (v8-M)
11	SVCall
12	DebugMonitor
14	PendSV
15	SysTick
16+	External IRQs (vendor-specific)

Exception entry stack frame

SP+0x1C  → xPSR        ← top
SP+0x18  → PC
SP+0x14  → LR
SP+0x10  → R12
SP+0x0C  → R3
SP+0x08  → R2
SP+0x04  → R1
SP+0x00  → R0          ← SP after entry

+ FPU frame (lazy):
SP+0x20..SP+0x60  → S0..S15 + FPSCR