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Architecture, peripherals, RTOSes, toolchains, vendor families, and real-world system designs — from microcontrollers to flight controllers, end to end.

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Cortex-M lineup

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Cortex-M lineup
sort:
CoreArchPipeDMIPSFPUDSPMPUTZMVENotes
Cortex-M0ARMv6-M3-stage0.84/MHz—Subset of Thumb-2.
Cortex-M0+ARMv6-M2-stage0.95/MHz—Single-cycle I/O port.
Cortex-M23ARMv8-M Baseline2-stage0.99/MHz—Secure & non-secure worlds.
Cortex-M3ARMv7-M3-stage1.25/MHz—The classic mid-range core.
Cortex-M33ARMv8-M Mainline3-stage1.50/MHzSPUsed in nRF53, STM32L5/U5.
Cortex-M4ARMv7E-M3-stage1.25/MHzSPMost popular general-purpose MCU core.
Cortex-M55ARMv8.1-M4-stage1.6/MHzSP/DP4–5× DSP/ML uplift vs. M4.
Cortex-M7ARMv7E-M6-stage2.14/MHzSP/DPUsed in i.MX RT, STM32H7.
Cortex-M85ARMv8.1-M7-stage3.0/MHzSP/DPi.MX RT700, Renesas RA8.

Code, highlighted

NVIC deep dive →
usart2_rx.c
c
// Set up a USART2 RX interrupt on Cortex-M4
NVIC_SetPriorityGrouping(0);
NVIC_SetPriority(USART2_IRQn, 5);
NVIC_EnableIRQ(USART2_IRQn);
__DSB(); __ISB();   // ensure the enable is observed

void USART2_IRQHandler(void) {
    if (USART2->ISR & USART_ISR_RXNE) {
        char c = USART2->RDR;   // reading RDR clears RXNE
        ring_push(c);
    }
}
Cortex-M memory map
  • 0xE000_0000Private Peripheral Bussystem
  • 0x4000_0000Peripheralperiph
  • 0x2000_0000SRAMsram
  • 0x0000_0000Codecode
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Every section, every page.

Architecture

15 pages

ARMv6-M through ARMv9-A. Pipelines, modes, exception models, memory ordering, security extensions.

Cortex-M

24 pages

Microcontroller-class cores — M0 through M85. Real-time, deterministic, deeply embedded.

Cortex-A

12 pages

Applications-class cores running rich operating systems. MMU, caches, SMP, virtualization.

Cortex-R

8 pages

Hard real-time, safety-critical. Lockstep cores, MPUs, tightly coupled memories.

Peripherals

19 pages

GPIO, UART, SPI, I²C, CAN, USB, Ethernet, DMA, ADC/DAC, timers — pattern-by-pattern.

Systems

16 pages

How real products are built — Wi-Fi routers, smartwatches, drones, EV chargers, thermostats. Block diagrams, software stacks, design tradeoffs.

Programming

55 pages

C, C++, Rust, assembly. Linker scripts, startup, CMSIS, low-level patterns — plus three hands-on tutorial tracks.

RTOS

21 pages

FreeRTOS, Zephyr, ThreadX, RT-Thread. Schedulers, IPC, tickless idle, priority inversion — plus a hands-on FreeRTOS tutorial.

Tools

10 pages

Compilers, debuggers, probes, IDEs, build systems, simulators.

Vendors

43 pages

STM32, NXP, Nordic, RP2040, Renesas, TI, Microchip, Silicon Labs, Infineon — plus GigaDevice, Artery, Nuvoton, Ambiq, Maxim/ADI, NVIDIA Jetson, MediaTek, and Rockchip.

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